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This work was supported by MICIU/AEI/10.13039/501100011033 through the Spanish Ministry of Science and Innovation under Grant PID2019-111443RB-100 and Grant PID2020-120151RB-I00. This article was recommended by Associate Editor M. Wang.

Analysis of institutional authors

Sebastia-Rullo, MCorresponding AuthorCid-Pastor, AAuthorValderrama-Blavi, HAuthorAroudi, A ElAuthorMartinez-Salamero, LAuthor

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Series Loss-Free Resistor as Stabilizing Active Damping of Constant-Power Load Systems

Publicated to:Ieee Transactions On Circuits And Systems I-Regular Papers. 71 (12): 5847-5860 - 2024-12-01 71(12), DOI: 10.1109/TCSI.2024.3392502

Authors: Sebastia-Rullo, M; Cid-Pastor, A; Valderrama-Blavi, H; Aroudi, A El; Martinez-Salamero, L

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Abstract

This paper presents the detailed design of an active damping system for the stabilization of an open-loop boost converter in constant-power load (CPL) operation. The reported work analyzes the steady-state regime of the interconnection of a boost converter supplying a CPL, and a loss-free resistor (LFR) in series with the converter input port (SLFR) performing the active damping. The LFR behavior is obtained by peak current mode control (PCMC) imposing proportionality between the steady-state average values of current and voltage in the SLFR input port. The isolated SEPIC fulfills the topological constraints of the interconnection and is selected to implement the SLFR. Finally, PSIM simulations and measurements from a 500 W prototype are in good agreement with the theoretical predictions and illustrate the system stabilization around the specified steady-state operating point for different values of the CPL power.

Keywords

Boost convertersCircuitsConstant power loadDampingMode controlRealizatioResistorsSeries loss-free resistorShock absorbersSteady-stateSteady-state converters interconnectioSteady-state converters interconnectionTopologyVoltage control

Quality index

Bibliometric impact. Analysis of the contribution and dissemination channel

The work has been published in the journal Ieee Transactions On Circuits And Systems I-Regular Papers due to its progression and the good impact it has achieved in recent years, according to the agency WoS (JCR), it has become a reference in its field. In the year of publication of the work, 2024 there are still no calculated indicators, but in 2023, it was in position 61/353, thus managing to position itself as a Q1 (Primer Cuartil), in the category Engineering, Electrical & Electronic.

Independientemente del impacto esperado determinado por el canal de difusión, es importante destacar el impacto real observado de la propia aportación.

Según las diferentes agencias de indexación, el número de citas acumuladas por esta publicación hasta la fecha 2025-06-09:

  • WoS: 1
  • Scopus: 2

Leadership analysis of institutional authors

There is a significant leadership presence as some of the institution’s authors appear as the first or last signer, detailed as follows: First Author (Sebastià Rullo, Max) and Last Author (Martínez Salamero, Luis).

the author responsible for correspondence tasks has been Sebastià Rullo, Max.